1. Field of the Invention
The present invention relates to a trench MOS semiconductor device mounted on a power conversion device such as an inverter.
2. Description of the Background Art
A power MOS semiconductor device includes main electrodes provided one on each surface in order to cause a main current to flow in a vertical direction (a thickness direction) of a semiconductor substrate and a gate electrode for on/off controlling the main current on one surface side. An insulated gate bipolar transistor (hereafter abbreviated to an IGBT) or a MOS field effect transistor (MOSFET) is a typical device thereof. A power MOS semiconductor device such as the IGBT has a unit cell aggregate structure in which a large number of unit cells each including the layer configuration of the IGBT in the semiconductor substrate are connected in parallel by the main electrodes on the two surfaces.
An inverter device on which this kind of IGBT is mounted includes, in case of an occurrence of a short circuit, a protection function which immediately detects an overcurrent due to the short circuit and interrupts power, but apart from this, as shown in FIG. 9, an IGBT 20 itself also has a function which, when an overcurrent is detected by an overcurrent protection circuit 30 incorporated therein as an external circuit, suppresses or interrupts a current, thus protecting the IGBT.
An IGBT combined with this kind of overcurrent protection circuit may incorporate a sense IGBT connected in parallel with a main IGBT. A trench gate IGBT in which, by making the gate threshold voltage of the sense IGBT higher than the gate threshold voltage of the main IGBT, the main IGBT is turned on later than the sense IGBT, thus protecting the main IGBT against an overcurrent, is known (Japanese Patent No. 3,361,874; Paragraphs [0031], [0032], and the like).
It is described that detection accuracy is increased by reducing the mutual interference between a main cell and a sense cell. The description that a malfunction of a protection circuit is prevented by reducing the gate capacitance of a sense cell portion and reducing a spike voltage generated in a current detection resistor (a sense resistor) when turning on, is disclosed (JP-A-8-8422; Abstract and Paragraphs [0019] and the like).
A trench MOS semiconductor device wherein it is possible to improve an interruptible current by suppressing a rise in on-voltage without deteriorating fast switching characteristics, is disclosed (JP-A-2007-221012; Paragraphs [0015] and the like).
A problem resulting from the difference of the sense current ratio between a sense IGBT and a main IGBT when switching, from the current ratio when in steady operation, when detecting a current (a sense current) flowing through the sense IGBT by measuring a voltage of the sense resistor, is described. There is also the description of the relationship with a feedback capacitance (JP-A-2012-119658; Paragraphs [0002], [0005], and the like). There is the description of an IGBT wherein when a voltage applied between the collector and the emitter is low, a Miller capacitance (a feedback capacitance) is reduced by connecting polysilicon in parallel trenches, which sandwich a floating region, to the emitter electrode. There is also the description that by p-type channel regions sandwiched between the parallel trenches being laid out in a staggered fashion like in a checkered pattern in order to adopt a non-floating structure, it is possible to dispose the p-type channel regions in a uniform dispersion, and a uniform field distribution too, thus protecting a reduction in element dielectric strength, and furthermore, that it is possible to reduce the Miller capacitance by narrowing the space between the parallel trenches (WO2011/111500A1; Paragraphs [0008], [0010 to 0015], and the like) (Japanese Patent No. 4,857,566; Paragraph [0013]).
Furthermore, in order to further reduce the on-voltage of the IGBT, there is an IEGT (Injection Enhanced Gate Transistor). The IEGT is an IGBT including a trench MOS gate structure having the IE effect (Injection Enhancement effect) of reducing the on-voltage by increasing the density of accumulation of holes on the emitter side of a drift layer (for example, JP-A-2001-308327). As a specific example of the IEGT, there is a trench gate IGBT of a structure in which a floating region 102-2, which is separated from an emitter electrode 107 by an insulating film 108 and electrically insulated by trenches 104 in a direction parallel to a main surface, and through which no main current flows, is provided in order to produce the IE effect, as shown in, for example, FIG. 10. The IEGT 300 also includes p-type channel regions 102-1, emitter regions 103, a gate insulating film 105 and a gate electrode 106. This IEGT 300 is known as being of a structure for further reducing the on-voltage of the trench gate IGBT.
Also, in the IEGT 300 of FIG. 10, as it has the electrically insulated floating region 102-2 in a potentially floating condition, injected carriers (holes) are likely to be accumulated in a drift layer 101 when turning on, thus reducing the on-voltage, but on the other hand, the capacitance between a gate electrode 110 and a collector electrode 109 increases, thus increasing a switching loss. In this way, in the IEGT 300, the on-voltage and the switching loss are in a trade-off relationship. Moreover, when the floating region 102-2 is provided, field concentration in the bottom portions of the trenches 104 is liable to increase, meaning that there is also the problem of it being difficult to increase a dielectric strength.
As previously described in Japanese Patent No. 3,361,874, JP-A-2007-221012, JP-A-2012-119658, WO2011/111500A1, Japanese Patent No. 4,857,566, and JP-A-2001-308327, in the trench gate IGBT, it is possible to increase the channel density, and thus possible to reduce the on-voltage, compared with in a planar gate IGBT, but as a result of the increase in the channel density, the gate capacitance also increases. When the gate capacitance increases, there arises the problem that the time required for charging and discharging is lengthened, thus increasing the switching loss.
FIG. 7 shows an equivalent circuit diagram wherein the overcurrent protection circuit 30 is removed from the equivalent circuit shown in FIG. 9 and a sense resistor Rs 23 is added to an equivalent circuit of the IGBT 20. In FIG. 7, when a main IGBT 21 and a sense IGBT 22, connected in parallel, are turned on, a low sense current Isense (Is) corresponding to the area ratio of the sense IGBT 22 of a small area to the main IGBT 21 of a large area flows through the sense IGBT 22 when the IGBT 20 is in steady on operation. Furthermore, when turning on, in addition to the sense current (Is), a displacement current Igs (=(Cge+Cgc)×dVg/dt) flowing transiently through a sense resistor Rs 23 flows through the sense IGBT 22 via a gate capacitance (Cge) between the gate electrode and emitter electrode of the sense IGBT 22 and a capacitance (Cgc) between the gate electrode and collector electrode. As a result of this, when switching, a voltage Vsp=Rs×(Igs+Is) higher than when in the steady on operation is generated in the sense resistor Rs 23.
This condition is shown in FIG. 8A which is a waveform diagram of the voltage and current generated in the gate electrode and sense resistor. Even though the displacement current Igs flowing through the sense resistor Rs is not a current proportional to a main current flowing between the collector and emitter of the main IGBT, there is a case in which the voltage Vsp generated in the sense resistor Rs by the displacement current Igs becomes too high to ignore. Because of this, it may happen that the voltage Vsp exceeds a voltage detection level which causes short circuit protection to operate. As a result of this, it is likely that this excess is erroneously detected as an overcurrent, thus interrupting the IGBT although a short circuit current is not flowing.
To respond to this problem, the period, in which the voltage Vsp is transiently generated in the sense resistor by the displacement current Igs when turning on, has heretofore been made a masking period in which the overcurrent protection circuit is not caused to operate. As a result of this, there is the possibility of a short circuit current flowing through the IGBT in the masking period and in a period from sending an off signal to the gate after a subsequent overcurrent detection until the IGBT is interrupted, meaning that it is necessary to cause the IGBT to secure the short circuit capacity of a size such that the IGBT does not break down in the periods. However, the IGBT which has secured the short circuit capacity of this kind of size has the problem that the on-voltage increases, thus increasing the switching loss.